October 31, 2017

FPGA Development Competences

Competences

  • Comprehensive FPGA design flow using the worldwide device producers
    • Specification, simulation, implemetation, power-up test, final verification
    • Experience with products of Xilinx, Intel (Altera), Lattice
  • Using high-speed communication standards
    • PCI Express
    • 10Gbit fiber
    • FPD LINK II
  • Using SoC techologies
    • Implementation of SoC based bare-metal and embedded linux systems
  • Optimization and implementation of real-time image processing systems
    • Real-time image processing algorithms
    • Low latency image processing based control systems
    • Low latency, high performance, imaging systems (imaging, sensor inteface, encoding/decoding, streaming)
  • Designing high performance data aquisition systems
    • Flexible configuration of multi-channel data aquisition
    • Precise synchronization and time stamps with external triggers
    • High precision AD converters
  • Development hardware in the loop real-time simulator (HIL Simulator)
    • High precision timing of model simulation
  • Development high performance custom digital interfaces

Reference Projects

Event Detection Intelligent Camera

Description

EDICAM (Event Detection Intelligent Camera) system is an optical diagnostic system research of the fusion power plants. Optical observation of the plasma with temperature of 100 million degrees celsius is one of the most important thing in the work of physicist. These measurements require highly customizable, ultra-fast imaging system.

Features

  • Readout up to 6 ROIs (Region of Interest) at the same time
  • Up to 400 fps at full resolution for 1 ROI
  • Up to 100.000 fps at 32×32 resolution for 1 ROI
  • 7.4Gbps overall throughput
  • Configurable read-out modes
  • Arbitrary ROI shape
  • Moving ROI configuration
  • Low latency, high throughput image processing for all ROIs
    • Median filter
    • Luma correction
    • Differential image
    • Intensity metrics calculation
  • Image processing based automatic triggering system
  • Up to 8 events for detecting real time events
    • Pixel intensity compare (min, max, sum thresholds)
    • Time compare
    • External triggers to supply multi-camera synchronization
  • Up to 8 configurable actions for real time controlling and triggering
  • 256 MByte framebuffer for high bandwidth image transfer to the host PC
  • Robust remote upgrade for both FPGA modules

FPD Link II Grabber / Streamer Device

Description

The FPD Link is a high-speed digital video interface. It is commonly used in the area of automotive and consumer electronics applications as well. The FPD Link II grabber/streamer card make the automatic tests possible all of these devices with detailed analysis of the link.

Features

  • Detailed timing analysis on the RX stream interface
  • Continuous image grabbing and streaming onward (on via ethernet or FPD Link)
  • Configurable streamer frame rate and timing
  • Automatic, long-term testing of FPD Link II devices
  • Flexible connection to the higher level measurement systems via gigabit ethernet (Labview, web-server…)

Hardware In the Loop Simulator (HIL Simulator)

Description

Testing electronic systems without the real-world environment helps to speed up development with early testing. Our hardware in the loop simulator makes possible to test the control system of a complex solar farm cleaning robot. The real-time HIL simulator allows to use exactly the same control system in the real application.

Features

  • Synchronized sampling of multiple analog sensors
  • Synchronized control of multiple motor drives
  • Configurable filtering on digital and analog input values
  • In-built real-time emulation of the physical system (generates proper measured values according to the modelled physical environment and to the control commands without real sensor inputs)

Safety Critical Control System

Description

In safety critical applications is important to avoid critical failures. It needs clear state machines with proper timing and protection against non-intended usage of the system. One way to meet this requirement is to design and develop an ASIC with high development cost and long time to market. The other way is to use a programmable logic device with the appropriate verification.

Features

  • IO controls with proper timing
  • Ensure the fully specified states the system
  • All time available watchdog function
  • Protection against uC failures (boot time, freeze, invalid switching, power-up situations, watchdog)

SoC Based Data Acquisition System

Description

Appropriate timing of multi-channel data acquisition applications is necessary. It requires low level, parallel, synchronized sampling. The real time processing of the samples allows fast response for: high value protection, high dynamic range, automatic dynamic range keeps high resolution, complex and flexible triggering and storage qualification configuration.

Features

  • Parallel, synchronized read-out of multiple high precision ADs
  • Configurable timing of samples
  • Using external triggers for precise timestamps
  • High dynamic range, high resolution with real-time signal processing
  • Configurable buffers in on-board DDR memories
  • Configurable control loop for high value protection
  • Real-time processing based triggering system
  • Complex, flexible triggering and storage qualification configurations